Dynamically reconfigurable cache architecture using adaptive block allocation policy

Authors:
Milene B. Carvalho;Luís F. W. Góes;Carlos A. P. S. Martins
Affiliations:
Computational and Digital Systems Laboratory, Pontifical Catholic University of Minas Gerais, Belo Horizonte, Brazil;Computational and Digital Systems Laboratory, Pontifical Catholic University of Minas Gerais, Belo Horizonte, Brazil;Computational and Digital Systems Laboratory, Pontifical Catholic University of Minas Gerais, Belo Horizonte, Brazil
Venue:
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Year:
2006

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Abstract

In this paper, we present a dynamically reconfigurable cache architecture using adaptive block allocation policy analyzed by means of simulation. Our main objectives are: to propose a reconfigurable cache architecture and to propose, implement and analyze the performance of an adaptive cache block allocation policy. First, we present a proposal of the reconfigurable cache architecture that can adapt according to the workload. Then we present our adaptive policy and do some performance tests comparing our cache architecture with some set associative configurations. In these tests, we use some traces from BYU Trace Distribution Center of SPEC 2000 Benchmark. Finally, we analyze the results based on some metrics like cache miss ratio, response time, etc.