Low-Power Application-Specific Processor for FFT Computations

Authors:
Teemu Oskari Pitkänen;Jarmo Takala
Affiliations:
Department of Computer Systems, Tampere University of Technology, Tampere, Finland 33101;Department of Computer Systems, Tampere University of Technology, Tampere, Finland 33101
Venue:
Journal of Signal Processing Systems
Year:
2011

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Abstract

In this paper, a processor architecture tailored for radix-4 and mixed-radix FFT computations is described. The processor has native support for power-of-two transform sizes. Several optimizations have been used to improve the energy-efficiency of the processor and experiments show that a programmable solution can possess energy-efficiency comparable to fixed-function ASICs.