Silicon physical random functions
Proceedings of the 9th ACM conference on Computer and communications security
Physical unclonable functions for device authentication and secret key generation
Proceedings of the 44th annual Design Automation Conference
Device-aware yield-centric dual-Vt design under parameter variations in nanoscale technologies
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fuzzy Extractors: How to Generate Strong Keys from Biometrics and Other Noisy Data
SIAM Journal on Computing
FPGA Intrinsic PUFs and Their Use for IP Protection
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
RF-DNA: Radio-Frequency Certificates of Authenticity
CHES '07 Proceedings of the 9th international workshop on Cryptographic Hardware and Embedded Systems
Techniques for Design and Implementation of Secure Reconfigurable PUFs
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Extended abstract: The butterfly PUF protecting IP on every FPGA
HST '08 Proceedings of the 2008 IEEE International Workshop on Hardware-Oriented Security and Trust
Power-Up SRAM State as an Identifying Fingerprint and Source of True Random Numbers
IEEE Transactions on Computers
Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
CHES '09 Proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems
Proceedings of the 46th Annual Design Automation Conference
Low-power sub-threshold design of secure physical unclonable functions
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
CMOS VLSI Design: A Circuits and Systems Perspective
CMOS VLSI Design: A Circuits and Systems Perspective
Hardware intrinsic security from D flip-flops
Proceedings of the fifth ACM workshop on Scalable trusted computing
Analyzing the impact of process variations on parametric measurements: novel models and applications
Proceedings of the Conference on Design, Automation and Test in Europe
An alternative to error correction for SRAM-like PUFs
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
The glitch PUF: a new delay-PUF architecture exploiting glitch shapes
CHES'10 Proceedings of the 12th international conference on Cryptographic hardware and embedded systems
Read-proof hardware from protective coatings
CHES'06 Proceedings of the 8th international conference on Cryptographic Hardware and Embedded Systems
Security applications of diodes with unique current-voltage characteristics
FC'10 Proceedings of the 14th international conference on Financial Cryptography and Data Security
PHAP: Password based Hardware Authentication using PUFs
MICROW '12 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture Workshops
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CMOS process variations are considered a burden to IC developers since they introduce undesirable random variability between equally designed ICs. However, it was demonstrated that measuring this variability can also be profitable as a physically unclonable method of silicon device identification. This can moreover be applied to generate strong cryptographic keys which are intrinsically bound to the embedding IC instance. This holds a number of very interesting advantages in comparison to traditional forms of secure identification and key storage. In this work, we summarize and compare the different proposed constructions and are able to identify some generalizing properties for PUFs on silicon devices.