T&I engine: traversal and intersection engine for hardware accelerated ray tracing

  • Authors:

  • Jae-Ho Nah;Jeong-Soo Park;Chanmin Park;Jin-Woo Kim;Yun-Hye Jung;Woo-Chan Park;Tack-Don Han

  • Affiliations:

  • Yonsei University, Korea;Yonsei University, Korea;Samsung Electronics, Korea;Yonsei University, Korea;Yonsei University, Korea;Sejong University, Korea;Yonsei University, Korea

  • Venue:
  • Proceedings of the 2011 SIGGRAPH Asia Conference
  • Year:
  • 2011

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Abstract

Ray tracing naturally supports high-quality global illumination effects, but it is computationally costly. Traversal and intersection operations dominate the computation of ray tracing. To accelerate these two operations, we propose a hardware architecture integrating three novel approaches. First, we present an ordered depth-first layout and a traversal architecture using this layout to reduce the required memory bandwidth. Second, we propose a three-phase ray-triangle intersection architecture that takes advantage of early exit. Third, we propose a latency hiding architecture defined as the ray accumulation unit. Cycle-accurate simulation results indicate our architecture can achieve interactive distributed ray tracing.