Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Design Challenges of Technology Scaling
IEEE Micro
Dynamic Thermal Management for High-Performance Microprocessors
HPCA '01 Proceedings of the 7th International Symposium on High-Performance Computer Architecture
Compact thermal modeling for temperature-aware design
Proceedings of the 41st annual Design Automation Conference
Dynamic Speed Scaling to Manage Energy and Temperature
FOCS '04 Proceedings of the 45th Annual IEEE Symposium on Foundations of Computer Science
MPARM: Exploring the Multi-Processor SoC Design Space with SystemC
Journal of VLSI Signal Processing Systems
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
Proceedings of the 43rd annual Design Automation Conference
System architecture evaluation using modular performance analysis: a case study
International Journal on Software Tools for Technology Transfer (STTT)
Temperature-aware processor frequency assignment for MPSoCs using convex optimization
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Reactive speed control in temperature-constrained real-time systems
Real-Time Systems
Interlayer cooling potential in vertically integrated packages
Microsystem Technologies - Special Issue on MicroNanoReliability 2007
Proactive Speed Scheduling for Real-Time Tasks under Thermal Constraints
RTAS '09 Proceedings of the 2009 15th IEEE Symposium on Real-Time and Embedded Technology and Applications
Network calculus: a theory of deterministic queuing systems for the internet
Network calculus: a theory of deterministic queuing systems for the internet
Thermally optimal stop-go scheduling of task graphs with real-time constraints
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Hotspot: acompact thermal modeling methodology for early-stage VLSI design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
System-level modeling of energy in TLM for early validation of power and thermal management
Proceedings of the Conference on Design, Automation and Test in Europe
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With ever-increasing power densities, temperature management using software and hardware techniques has become a necessity in the design of modern electronic systems. Such techniques have to be validated and optimized with respect to the thermal guarantee they provide, i.e., a safe upper-bound on the peak temperature of the system under all operating conditions. The computation of such a guarantee depends on the power and timing characteristics of the system. In this paper, we present formalisms to capture such characteristics at the system-level and provide an analytical technique to compute a provably safe upper-bound on the peak temperature. The proposed characterization and analysis is general in that it considers an impulse-response-based thermal model, task-dependent power consumption, tasks with dynamic arrival patterns and variable resource demand, and a scheduling policy expressed as a hierarchical composition of several commonly used policies.