An exploration of mechanisms for dynamic cryptographic instruction set extension

Authors:
Philipp Grabher;Johann Großschädl;Simon Hoerder;Kimmo Järvinen;Dan Page;Stefan Tillich;Marcin Wójcik
Affiliations:
University of Bristol, Department of Computer Science, Merchant Venturers Building, Bristol, UK;University of Luxembourg, FSTC, CSC Research Unit, LACS, Luxembourg, Luxembourg;University of Bristol, Department of Computer Science, Merchant Venturers Building, Bristol, UK;Aalto University, Department of Information and Computer Science, Aalto, Finland;University of Bristol, Department of Computer Science, Merchant Venturers Building, Bristol, UK;University of Bristol, Department of Computer Science, Merchant Venturers Building, Bristol, UK;University of Bristol, Department of Computer Science, Merchant Venturers Building, Bristol, UK
Venue:
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Year:
2011

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Abstract

Instruction Set Extensions (ISEs) supplement a host processor with special-purpose, typically fixed-function hardware components and instructions to utilize them. For cryptographic use-cases, this can be very effective due to the demand for non-standard or niche operations that are not supported by general-purpose architectures. However, one disadvantage of fixed-function ISEs is inflexibility, contradicting a need for "algorithm agility." This paper explores a new approach, namely the provision of re-configurable mechanisms to support dynamic (run-time changeable) ISEs. Our results, obtained using an FPGA-based LEON3 prototype, show that this approach provides a flexible general-purpose platform for cryptographic ISEs with all known advantages of previous work, but relies on careful analysis of the associated security issues.