Trusted hardware: can it be trustworthy?
Proceedings of the 44th annual Design Automation Conference
Designing secure systems on reconfigurable hardware
ACM Transactions on Design Automation of Electronic Systems (TODAES)
FPGA Architecture: Survey and Challenges
Foundations and Trends in Electronic Design Automation
Guest Editors’ Introduction to Security in Reconfigurable Systems Design
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing
ARC '09 Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications
Security Primitives for Reconfigurable Hardware-Based Systems
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
SeReCon: a secure reconfiguration controller for self-reconfigurable systems
International Journal of Critical Computer-Based Systems
Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
DISTROY: detecting integrated circuit Trojans with compressive measurements
HotSec'11 Proceedings of the 6th USENIX conference on Hot topics in security
An exploration of mechanisms for dynamic cryptographic instruction set extension
CHES'11 Proceedings of the 13th international conference on Cryptographic hardware and embedded systems
Wireless security techniques for coordinated manufacturing and on-line hardware trojan detection
Proceedings of the fifth ACM conference on Security and Privacy in Wireless and Mobile Networks
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Formal Modeling and Verification of Security Property in Handel C Program
International Journal of Secure Software Engineering
VeriTrust: verification for hardware trust
Proceedings of the 50th Annual Design Automation Conference
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Blurring the line between software and hardware, reconfigurable devices strike a balance between the raw high speed of custom silicon and the post-fabrication flexibility of general-purpose processors. While this flexibility is a boon for embedded system developers, who can now rapidly prototype and deploy solutions with performance approaching custom designs, this results in a system development methodology where functionality is stitched together from a variety of "soft IP cores," often provided by multiple vendors with different levels of trust. Unlike traditional software where resources are managed by an operating system, soft IP cores necessarily have very fine grain control over the underlying hardware. To address this problem, the embedded systems community requires novel security primitives which address the realities of modern reconfigurable hardware. We propose an isolation primitive, moats and drawbridges, that are built around four design properties: logical isolation, interconnect traceability, secure reconfigurable broadcast, and configuration scrubbing. Each of these is a fundamental operation with easily understood formal properties, yet maps cleanly and efficiently to a wide variety of reconfigurable devices. We carefully quantify the required overheads on real FPGAs and demonstrate the utility of our methods by applying them to the practical problem of memory protection.