Analysis of power consumption on switch fabrics in network routers
Proceedings of the 39th annual Design Automation Conference
Algorithms for VLSI Physcial Design Automation
Algorithms for VLSI Physcial Design Automation
Bandwidth-Constrained Mapping of Cores onto NoC Architectures
Proceedings of the conference on Design, automation and test in Europe - Volume 2
HERMES: an infrastructure for low area overhead packet-switching networks on chip
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
Energy-aware mapping for tile-based NoC architectures under performance constraints
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
NoC Topologies Exploration based on Mapping and Simulation Models
DSD '07 Proceedings of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools
Combining mapping and partitioning exploration for NoC-based embedded systems
Journal of Systems Architecture: the EUROMICRO Journal
FCCM '10 Proceedings of the 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines
Heterogeneous vs homogeneous MPSoC approaches for a mobile LTE modem
Proceedings of the Conference on Design, Automation and Test in Europe
MPSoC programming using the MAPS compiler
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Task Assignment with Cache Partitioning and Locking for WCET Minimization on MPSoC
ICPP '10 Proceedings of the 2010 39th International Conference on Parallel Processing
Journal of Systems Architecture: the EUROMICRO Journal
CAFES: A framework for intrachip application modeling and communication architecture design
Journal of Parallel and Distributed Computing
Journal of Systems Architecture: the EUROMICRO Journal
Hi-index | 0.00 |
Software complexity has increased considerably over recent years, needing special target architectures as MPSoCs to fulfill the heavy memory, communication and computation requirements. Nevertheless, the use of MPSoCs has brought attention to the need for effective methods and tools for parallel software development. Methodologies aggregating partitioning and mapping are normally employed to fulfill the heavy requirements of such systems. This paper explores task-partitioning and processor-mapping methods on homogeneous NoC-Based MPSoC. The effect of both on application's energy consumption is explored alone and jointly. Experiments with several synthetic and four real applications show that the energy consumption is reduced up to 18%, 31.8% or 38.1% when applying partitioning, mapping or both, respectively.