Buffer insertion for clock delay and skew minimization
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization
ISPD '00 Proceedings of the 2000 international symposium on Physical design
ISPD '00 Proceedings of the 2000 international symposium on Physical design
A performance-driven standard-cell placer based on a modified force-directed algorithm
Proceedings of the 2001 international symposium on Physical design
Estimating routing congestion using probabilistic analysis
Proceedings of the 2001 international symposium on Physical design
Publicly detectable techniques for the protection virtual components
Proceedings of the 38th annual Design Automation Conference
An effective congestion driven placement framework
Proceedings of the 2002 international symposium on Physical design
Consistent placement of macro-blocks using floorplanning and standard-cell placement
Proceedings of the 2002 international symposium on Physical design
Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designs
Proceedings of the 2002 international symposium on Physical design
Monotone bipartitioning problem in a planar point set with applications to VLSI
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Fast placement approaches for FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A New Floorplanning Method for FPGA Architectural Research
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Track assignment: a desirable intermediate step between global routing and detailed routing
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
System-Level Point-to-Point Communication Synthesis Using Floorplanning Information
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Quality of EDA CAD Tools: Definitions, Metrics and Directions
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Evolutionary algorithms for the physical design of VLSI circuits
Advances in evolutionary computing
On finding an empty staircase polygon of largest area (width) in a planar point-set
Computational Geometry: Theory and Applications
Manhattan-diagonal routing in channels and switchboxes
ACM Transactions on Design Automation of Electronic Systems (TODAES)
IPRAIL: intellectual property reuse-based analog IC layout automation
Integration, the VLSI Journal - Special issue on analog and mixed-signal IC design and design methodologies
Layout Conscious Bus Architecture Synthesis for Deep Submicron Systems on Chip
Proceedings of the conference on Design, automation and test in Europe - Volume 1
A methodology for low power scheduling with resources operating at multiple voltages
Integration, the VLSI Journal
A Comparative Study of Two Boolean Formulations of FPGA Detailed Routing Constraints
IEEE Transactions on Computers
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Phase correct routing for alternating phase shift masks
Proceedings of the 41st annual Design Automation Conference
Floorplanning optimization with trajectory piecewise-linear model for pipelined interconnects
Proceedings of the 41st annual Design Automation Conference
Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Annealing placement by thermodynamic combinatorial optimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Accurate and efficient flow based congestion estimation in floorplanning
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Combinatorial techniques for mixed-size placement
ACM Transactions on Design Automation of Electronic Systems (TODAES)
This paper presents a cost-effective area-IO DRAM A CAD Tool and Algorithms
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Thermal-Aware Floorplanning Using Genetic Algorithms
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Multi-level genetic algorithm (MLGA) for the construction of clock binary tree
GECCO '05 Proceedings of the 7th annual conference on Genetic and evolutionary computation
Encyclopedia of Computer Science
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Delay noise pessimism reduction by logic correlations
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Silicon virtual prototyping: the new cockpit for nanometer chip design
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Redundant-via enhanced maze routing for yield improvement
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Biobjective evolutionary and heuristic algorithms for intersection of geometric graphs
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Modeling and simulating coverage in sensor networks
Computer Communications
Implementing DSP Algorithms with On-Chip Networks
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
On-chip decoupling capacitance and P/G wire co-optimization for dynamic noise
Proceedings of the 44th annual Design Automation Conference
Microarchitecture configurations and floorplanning co-optimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Range-aggregate query problems involving geometric aggregation operations
Nordic Journal of Computing
Exploiting hierarchy and structure to efficiently solve graph coloring as SAT
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Using metro-on-chip in physical design flow for congestion and routability improvement
Microelectronics Journal
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
On routing in VLSI design and communication networks
Discrete Applied Mathematics
Three-dimensional Integrated Circuit Design
Three-dimensional Integrated Circuit Design
Ispd2009 clock network synthesis contest
Proceedings of the 2009 international symposium on Physical design
Deflecting crosstalk by routing reconsideration through refined signal correlation estimation
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Performance-driven circuit and layout co-optimization for deep-submicron analog circuits
Analog Integrated Circuits and Signal Processing
Floorplan-based FPGA interconnect power estimation in DSP circuits
Proceedings of the 11th international workshop on System level interconnect prediction
Using XML for VLSI Physical Design Automation
ICA3PP '09 Proceedings of the 9th International Conference on Algorithms and Architectures for Parallel Processing
Custom networks-on-chip architectures with multicast routing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient preprocessing for VLSI optimization problems
Computational Optimization and Applications
A new physical routing approach for robust bundled signaling on NoC links
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Thermal-aware floorplanning exploration for 3D multi-core architectures
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Clock skew reduction by self-compensating manufacturing variability with on-chip sensors
Proceedings of the 20th symposium on Great lakes symposium on VLSI
A novel droplet routing algorithm for digital microfluidic biochips
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Pin assignment using stochastic local search constraint programming
CP'09 Proceedings of the 15th international conference on Principles and practice of constraint programming
A power-efficient multipin ILP-based routing technique
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Proceedings of the Conference on Design, Automation and Test in Europe
Algorithms and theory of computation handbook
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Fixed-outline floorplanning: enabling hierarchical design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Partitioning and mapping on NoC-Based MPSoC: an energy consumption saving approach
Proceedings of the 4th International Workshop on Network on Chip Architectures
EUC'06 Proceedings of the 2006 international conference on Embedded and Ubiquitous Computing
Isothetic polygonal approximations of a 2d object on generalized grid
PReMI'05 Proceedings of the First international conference on Pattern Recognition and Machine Intelligence
Algorithms for range-aggregate query problems involving geometric aggregation operations
ISAAC'05 Proceedings of the 16th international conference on Algorithms and Computation
Wirelength minimization in partitioning and floorplanning using evolutionary algorithms
VLSI Design - Special issue on CAD for Gigascale SoC Design and Verification Solutions
Netlist bipartitioning using particle swarm optimisation technique
International Journal of Artificial Intelligence and Soft Computing
Arithmetic algorithms for ternary number system
VDAT'12 Proceedings of the 16th international conference on Progress in VLSI Design and Test
Note on the hardness of generalized connectivity
Journal of Combinatorial Optimization
Is split manufacturing secure?
Proceedings of the Conference on Design, Automation and Test in Europe
Routability optimization for crossbar-switch structured ASIC design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DREAMS: DFM rule EvAluation using manufactured silicon
Proceedings of the International Conference on Computer-Aided Design
Journal of Systems Architecture: the EUROMICRO Journal
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From the Publisher:This work covers all aspects of physical design. The book is a core reference for graduate students and CAD professionals. For students, concept and algorithms are presented in an intuitive manner. For CAD professionals, the material presents a balance of theory and practice. An extensive bibliography is provided which is useful for finding advanced material on a topic. At the end of each chapter, exercises are provided, which range in complexity from simple to research level.