IPRAIL: intellectual property reuse-based analog IC layout automation

Authors:
Nuttron Jangkrajarng;Sambuddha Bhattacharya;Roy Hartono;C.-J. Richard Shi
Affiliations:
Mixed-Signal CAD Research Laboratory, Department of Electrical Engineering, University of Washington, Seattle, WA;Mixed-Signal CAD Research Laboratory, Department of Electrical Engineering, University of Washington, Seattle, WA;Mixed-Signal CAD Research Laboratory, Department of Electrical Engineering, University of Washington, Seattle, WA;Mixed-Signal CAD Research Laboratory, Department of Electrical Engineering, University of Washington, Seattle, WA
Venue:
Integration, the VLSI Journal - Special issue on analog and mixed-signal IC design and design methodologies
Year:
2003

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Abstract

This paper presents a computer-aided design tool, IPRAIL, which automatically retargets existing analog layouts for technology migration and new design specifications. The reuse-based methodology adopted in IPRAIL utilizes expert designer knowledge embedded in analog layouts. IPRAIL automatically extracts analog layout intellectual properties as templates, incorporates new technology design rules and device sizes, and generates fully functional layouts. This is illustrated by retargeting two practical operational amplifier layouts from the TSMC 0.25 µm CMOS process to the TSMC 0.18 µm CMOS process. While manual re-design is known to take days to weeks, IPRAIL only takes minutes and achieves comparable circuit performances.