Thermal-Aware Floorplanning Using Genetic Algorithms

Authors:
W-L. Hung;Y. Xie;N. Vijaykrishnan;C. Addo-Quaye;T. Theocharides;M. J. Irwin
Affiliations:
The Pennsylvania State University, University Park, PA;The Pennsylvania State University, University Park, PA;The Pennsylvania State University, University Park, PA;The Pennsylvania State University, University Park, PA;The Pennsylvania State University, University Park, PA;The Pennsylvania State University, University Park, PA
Venue:
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Year:
2005

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Abstract

In this work, we present a genetic algorithm based thermal-aware floorplanning framework that aims at reducing hot spots and distributing temperature evenly across a chip while optimizing the traditional design metric, chip area. The floorplanning problem is formulated as a genetic algorithm problem, and a tool called HotSpot is used to calculate floorplanning temperature based on the power dissipation, the physical dimension, and the location of modules. Area and/or temperature optimizations guide the genetic algorithm to generate the final fittest solution. The experimental results using MCNC benchmarks and a face detection chip show that our combined area and thermal optimization technique decreases the peak temperature sufficiently while providing floorplans that are as compact as the traditional area-oriented techniques.