Combinatorial algorithms for integrated circuit layout
Combinatorial algorithms for integrated circuit layout
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Minimum Cost Paths in Periodic Graphs
SIAM Journal on Computing
Parallel Suffix--Prefix-Matching Algorithm and Applications
SIAM Journal on Computing
Hybrid floorplanning based on partial clustering and module restructuring
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Synthesis and floorplanning for large hierarchical FPGAs
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Performance driven floorplanning for FPGA based designs
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A methodology for fast FPGA floorplanning
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Algorithms for VLSI Physcial Design Automation
Algorithms for VLSI Physcial Design Automation
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
VPR: A new packing, placement and routing tool for FPGA research
FPL '97 Proceedings of the 7th International Workshop on Field-Programmable Logic and Applications
A Retargetable Macro Generation Method for the Evaluation of Repetitive Configurable Architectures
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
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In this paper, we propose a new approach for solving discrete floorplanning problems. Using an abstract architecture model, our method is suitable especially for FPGA architectural research: Modules to be placed and the target architecture are modeled by periodic graphs. The objective is, to find a valid assignment of module nodes to slot nodes of the target architecture, such that a cost function on the placement will be minimized. We use an algorithm which is abstracted and derived from a traditional pattern matching technique.