The design and implementation of PowerMill
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Statistical sampling and regression analysis for RT-level power evaluation
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Function-level power estimation methodology for microprocessors
Proceedings of the 37th Annual Design Automation Conference
Wattch: a framework for architectural-level power analysis and optimizations
Proceedings of the 27th annual international symposium on Computer architecture
Run-time power estimation in high performance microprocessors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Software Power Estimation and Optimization for High Performance, 32-bit Embedded Processors
ICCD '98 Proceedings of the International Conference on Computer Design
Power provisioning for a warehouse-sized computer
Proceedings of the 34th annual international symposium on Computer architecture
Analysis of dynamic voltage/frequency scaling in chip-multiprocessors
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
Evaluation and modeling of power consumption of a heterogeneous dual-core processor
ICPADS '07 Proceedings of the 13th International Conference on Parallel and Distributed Systems - Volume 01
PowerNap: eliminating server idle power
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
Real time power estimation and thread scheduling via performance counters
ACM SIGARCH Computer Architecture News
Decomposable and responsive power models for multicore processors using performance counters
Proceedings of the 24th ACM International Conference on Supercomputing
Practical power consumption estimation for real life HPC applications
Future Generation Computer Systems
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Recently, energy-efficient computing has become a major interest, both in the mobile and IT sectors. With the advent of multi-core processors and their energy-saving mechanisms, there is a necessity to model their power consumption. The existing models for multi-core processors are based on the assumption that the power consumption of multiple cores performing parallel computations is equal to the sum of the power of each of those active cores. In this paper, we analyze this assumption and show that it leads to lack of accuracy when applied to modern processors such as quad-core. Based on our analysis, we present a methodology for estimating the power consumption of multi-core processors. Unlike existing models, we take into account resource sharing and power saving mechanisms. We show that our approach provides an accuracy within a maximum error of 5%.