Scan line array processors for image computation
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Optimal Graph Algorithms on a Fixed-Size Linear Array
IEEE Transactions on Computers
Parallel computer vision
Parallel computer vision
IEEE Transactions on Pattern Analysis and Machine Intelligence - Special Issue on Industrial Machine Vision and Computer Vision Technology:8MPart
Fundamentals of digital image processing
Fundamentals of digital image processing
Computing the Hough Transform on a Scan Line Array Processor (Image Processing)
IEEE Transactions on Pattern Analysis and Machine Intelligence
Discrete-time signal processing
Discrete-time signal processing
Introduction to algorithms
ASP: A Cost-Effective Parallel Microcomputer
IEEE Micro
DAP—a distributed array processor
ISCA '73 Proceedings of the 1st annual symposium on Computer architecture
Finding connected components on a scan line array processor
Proceedings of the seventh annual ACM symposium on Parallel algorithms and architectures
A High Speed VLSI Architecture for Handwriting Recognition
Journal of VLSI Signal Processing Systems - Parallel VLSI architectures for image and video processing
An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems
Proceedings of the 32nd annual international symposium on Computer Architecture
An Integrated Memory Array Processor for Embedded Image Recognition Systems
IEEE Transactions on Computers
Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor
IEICE - Transactions on Information and Systems
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We develop efficient algorithms for low and intermediate level image processing on the scan line array processor, a SIMD machine consisting of a linear array of cells that processes images in a scan line fashion. For low level processing, we present algorithms for block DFT, block DCT, convolution, template matching, shrinking, and expanding which run in real-time. By real-time, we mean that, if the required processing is based on neighborhoods of size m脳m, then the output lines are generated at a rate of O(m) operations per line and a latency of O(m) scan lines, which is the best that can be achieved on this model. We also develop an algorithm for median filtering which runs in almost real-time at a cost of O(m${\rm log}$m) time per scan line and a latency of ${\bf \lfloor^{\underline m}_{\,\, 2}\rfloor}$ scan lines. For intermediate level processing, we present optimal algorithms for translation, histogram computation, scaling, and rotation. We also develop efficient algorithms for labelling the connected components and determining the convex hulls of multiple figures which run in O(n${\rm log}$n) and O(n${\rm log}$2n) time, respectively. The latter algorithms are significantly simpler and easier to implement than those already reported in the literature for linear arrays.