Multicore acceleration of Discrete Event System Specification systems

  • Authors:
  • Qi Liu;Gabriel Wainer

  • Affiliations:
  • IBM T. J. Watson Research Center, USA;Department of Systems and Computer Engineering, Carleton University, Canada

  • Venue:
  • Simulation
  • Year:
  • 2012

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Abstract

Parallel discrete-event simulation on heterogeneous multicore platforms requires innovative redesign of existing algorithms in return for better performance. Based on the Discrete Event System Specification (DEVS) methodology, a technique called Multicore Acceleration of DEVS Systems is proposed for efficient parallel discrete-event simulation on the IBM Cell processor. The technique combines multi-grained parallelism and various optimizations to overcome performance bottlenecks, while hiding the technical details of multicore programming from non-expert users. By explicitly exploiting the data- and event-level parallelism inherent in the simulation, the technique significantly accelerates both memory-bound and compute-bound computational kernels in demanding parallel DEVS simulations, as shown in the experimental results. Several key concepts and methods derived from this research can also be applied to other multicore and shared-memory architectures.