Parallel reduced area multipliers

A Family of Variable-Precision Interval Arithmetic Processors

IEEE Transactions on Computers

Fault-Tolerant Newton-Raphson and Goldschmidt Dividers Using Time Shared TMR

IEEE Transactions on Computers

Integer Multiplication with Overflow Detection or Saturation

IEEE Transactions on Computers - Special issue on computer arithmetic

Modified booth truncated multipliers

Proceedings of the 14th ACM Great Lakes symposium on VLSI

Instruction level redundant number computations for fast data intensive processing in asynchronous processors

Journal of Systems Architecture: the EUROMICRO Journal

Reciprocal and Reciprocal Square Root Units with Operand Modification and Multiplication

Journal of VLSI Signal Processing Systems

Dual-mode floating-point multiplier architectures with parallel operations

Journal of Systems Architecture: the EUROMICRO Journal

Integer squarers with overflow detection

Computers and Electrical Engineering

Enhanced-functionality multipliers

Journal of Systems Architecture: the EUROMICRO Journal

A novel FIR filter implementation using truncated MCM technique

Asilomar'09 Proceedings of the 43rd Asilomar conference on Signals, systems and computers