Disk cache—miss ratio analysis and design considerations
ACM Transactions on Computer Systems (TOCS)
An adaptive two-level management for the flash translation layer in embedded systems
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
On efficient wear leveling for large-scale flash-memory storage systems
Proceedings of the 2007 ACM symposium on Applied computing
Evaluation of design for reliability techniques in embedded flash memories
Proceedings of the conference on Design, automation and test in Europe
A log buffer-based flash translation layer using fully-associative sector translation
ACM Transactions on Embedded Computing Systems (TECS)
BPLRU: a buffer management scheme for improving random writes in flash storage
FAST'08 Proceedings of the 6th USENIX Conference on File and Storage Technologies
Design tradeoffs for SSD performance
ATC'08 USENIX 2008 Annual Technical Conference on Annual Technical Conference
Write off-loading: Practical power management for enterprise storage
ACM Transactions on Storage (TOS)
Proceedings of the 14th international conference on Architectural support for programming languages and operating systems
Performance Trade-Offs in Using NVRAM Write Buffer for Flash Memory-Based Storage Devices
IEEE Transactions on Computers
Adding aggressive error correction to a high-performance compressing flash file system
EMSOFT '09 Proceedings of the seventh ACM international conference on Embedded software
Energy-aware error control coding for Flash memories
Proceedings of the 46th Annual Design Automation Conference
Proceedings of the 46th Annual Design Automation Conference
CFTL: a convertible flash translation layer adaptive to data access patterns
Proceedings of the ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Increasing PCM main memory lifetime
Proceedings of the Conference on Design, Automation and Test in Europe
KAST: K-Associative Sector Translation for NAND flash memory in real-time systems
Proceedings of the Conference on Design, Automation and Test in Europe
Rejuvenator: A static wear leveling algorithm for NAND flash memory with minimized overhead
MSST '11 Proceedings of the 2011 IEEE 27th Symposium on Mass Storage Systems and Technologies
A space-efficient flash translation layer for CompactFlash systems
IEEE Transactions on Consumer Electronics
FAB: flash-aware buffer management policy for portable media players
IEEE Transactions on Consumer Electronics
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Address mapping for flash devices has been a challenging design problem for controllers because of the rapidly growing device capacity. Different from the past work, a capacity-independent address mapping scheme that only depends on users' access data set, referred to as working set, is proposed. As a result, fine-grained address mapping is achieved with significant performance boosting, compared to the past work. In addition, a simple but practical wear-leveling design is proposed with the capability in lifetime estimation of flash devices. The proposed scheme was evaluated by a series of experiments with encouraging results.