Q-Modules: Internally Clocked Delay-Insensitive Modules
IEEE Transactions on Computers
Formal program transformations for VLSI circuit synthesis
Formal development programs and proofs
Algorithms for synthesis of hazard-free asynchronous circuits
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
A generalized state assignment theory for transformations on signal transition graphs
Journal of VLSI Signal Processing Systems - Special issue: asynchronous circuit design for VLSI signal processing
Basic gate implementation of speed-independent circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
A general state graph transformation framework for asynchronous synthesis
EURO-DAC '94 Proceedings of the conference on European design automation
Automatic gate-level synthesis of speed-independent circuits
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Self-Timed Control of Concurrent Processes: The Design of Aperiodic Logical Circuits in Computers and Discrete Systems
Sequential Circuit Design Using Synthesis and Optimization
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Synthesis of 3D Asynchronous State Machines
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
UCLOCK: Automated Design of High-Peformance Unclocked State Machines
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Logic synthesis for vlsi design
Logic synthesis for vlsi design
Hierarchical optimization of asynchronous circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Optimised state assignment for asynchronous circuit synthesis
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
EDTC '97 Proceedings of the 1997 European conference on Design and Test
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