A high-performance transport network platform
IBM Systems Journal
Pipelined memory shared buffer for VLSI switches
SIGCOMM '95 Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication
ATM: paving the information superhighway
IBM Systems Journal
Design and evaluation of a DRAM-based shared memory ATM switch
SIGMETRICS '97 Proceedings of the 1997 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
A new buffer management scheme for hierarchical shared memory switches
IEEE/ACM Transactions on Networking (TON)
HIPIQS: A High-Performance Switch Architecture Using Input Queuing
IEEE Transactions on Parallel and Distributed Systems
Analytical models for replicate-at-send multicasting in shared-memory switches
Performance Evaluation
Pipelined Multi-Queue Management in a VLSI ATM Switch Chip with Credit-Based Flow-Control
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
HIPIQS: A High-Performance Switch Architecture using Input Queuing
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
IBM Journal of Research and Development
A logarithmic scheduling algorithm for high speed input-queued switches
Computer Communications
PIPORS: a parallel input parallel output register switching system
Computers and Electrical Engineering
Saturating the transceiver bandwidth: switch fabric design on FPGAs
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Research: Space division approach to implement a shared buffer in an ATM switch
Computer Communications
Queuing analysis of shared-buffer switches with control scheme under bursty traffic
Computer Communications
Impact of ATM switch architectures on CBR video performance
Computer Communications
Review: Review of recent shared memory based ATM switches
Computer Communications
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