Model and analysis for combined package and on-chip power grid simulation
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
A static pattern-independent technique for power grid voltage integrity verification
Proceedings of the 40th annual Design Automation Conference
Effects of on-chip inductance on power distribution grid
Proceedings of the 2005 international symposium on Physical design
Power grid physics and implications for CAD
Proceedings of the 43rd annual Design Automation Conference
ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
On the bound of time-domain power supply noise based on frequency-domain target impedance
Proceedings of the 11th international workshop on System level interconnect prediction
Three-dimensional silicon integration
IBM Journal of Research and Development
Fast vectorless power grid verification using an approximate inverse technique
Proceedings of the 46th Annual Design Automation Conference
An adaptive parallel flow for power distribution network simulation using discrete Fourier transform
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Toward PDN resource estimation: a law of general power density
Proceedings of the System Level Interconnect Prediction Workshop
Inductive properties of high-performance power distribution grids
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper addresses the modeling and analysis problems for power distribution networks (PDNs) in 3-D ICs. An on-chip distributed model is proposed for 3-D power grids, in which the details of metal layers are considered. The distributed model is demonstrated to be essential to identifying the unique noise behavior of 3-D PDNs. A lumped model is proposed based on the distributed model. The lumped model features the connection impedance between tiers and is proven to be useful for designers to understand the global effects of 3-D PDNs. Based on the models, an analysis flow is designed for 3-D PDNs in both frequency domain and time domain. With the analysis flow, the electrical characteristics of 3-D PDNs are studied systematically for the first time. The frequency-domain analysis identifies the global and local resonance phenomena in 3-D PDNs that are distinct from those in 2-D PDNs. The physical mechanisms behind the resonance phenomena are investigated. The time-domain analysis predicts the worst-case supply noise based on distributed current constraints. The "Rogue Wave" concept is introduced to explain the spatial and temporal relations of the worst-case on-chip noise responses in 3-D PDNs.