The coupling effect: fact or fiction
TAV3 Proceedings of the ACM SIGSOFT '89 third symposium on Software testing, analysis, and verification
Investigations of the software testing coupling effect
ACM Transactions on Software Engineering and Methodology (TOSEM)
A VHDL error simulator for functional test generation
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Systematic mistake analysis of digital computer programs
Communications of the ACM
Coverage Metrics for Functional Validation of Hardware Designs
IEEE Design & Test
Fault Injection and Dependability Evaluation of Fault-Tolerant Systems
IEEE Transactions on Computers
An Integrated HW and SW Fault Injection Environment for Real-Time Systems
DFT '98 Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems
Implicit test generation for behavioral VHDL models
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Coverage-oriented verification of banias
Proceedings of the 40th annual Design Automation Conference
A Functional Verification based Fault Injection Environment
DFT '07 Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Leveraging a Commercial Mutation Analysis Tool For Research
TAICPART-MUTATION '07 Proceedings of the Testing: Academic and Industrial Conference Practice and Research Techniques - MUTATION
Weak Mutation Testing and Completeness of Test Sets
IEEE Transactions on Software Engineering
Testing Programs with the Aid of a Compiler
IEEE Transactions on Software Engineering
Novel probabilistic combinational equivalence checking
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Automatic Selection of Internal Observation Signals for Design Verification
VTS '09 Proceedings of the 2009 27th IEEE VLSI Test Symposium
An Analysis and Survey of the Development of Mutation Testing
IEEE Transactions on Software Engineering
On automatic-verification pattern generation for SoC with port-order fault model
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Mutation Analysis (MA) is a fault-based simulation technique that is used to measure the quality of testbenches in error (mutant) detection. Although MA effectively reports the living mutants to designers, it suffers from the high simulation cost. This paper presents a probabilistic MA preprocessing technique, Error Propagation Analysis (EPA), to speed up the MA process. EPA can statically estimate the probability of the error propagation with respect to each mutant for guiding the observation-point insertion. The inserted observation-points will reveal a mutant's status earlier during the simulation such that some useless testcases can be discarded later. We use the mutant model from an industrial EDA tool, Certitude, to conduct our experiments on the OpenCores' RT-level designs. The experimental results show that the EPA approach can save about 14% CPU time while obtaining the same mutant status report as the traditional MA approach.