Runtime power estimator calibration for high-performance microprocessors

  • Authors:
  • Hai Wang;Sheldon X.-D. Tan;Xue-Xin Liu;Ashish Gupta

  • Affiliations:
  • University of California, Riverside, CA;University of California, Riverside, CA;University of California, Riverside, CA;Intel Corporation, Chandler, AZ

  • Venue:
  • DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
  • Year:
  • 2012

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Abstract

Accurate runtime power estimation is important for on-line thermal/power regulation on today's high performance processors. In this paper, we introduce a power calibration approach with the assistance of on-chip physical thermal sensors. It is based on a new error compensation method which corrects the errors of power estimations using the feedback from physical thermal sensors. To deal with the problem of limited number of physical thermal sensors, we propose a statistical power correlation extraction method to estimate powers for places without thermal sensors. Experimental results on standard SPEC benchmarks show the new method successfully calibrates the power estimator with very low overhead introduced.