Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Influence of compiler optimizations on system power
Proceedings of the 37th Annual Design Automation Conference
Energy-efficient signal processing using FPGAs
FPGA '03 Proceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays
Introduction to the Scheduling Problem
IEEE Design & Test
Stream-Oriented FPGA Computing in the Streams-C High Level Language
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Low-power high-level synthesis for FPGA architectures
Proceedings of the 2003 international symposium on Low power electronics and design
LLVM: A Compilation Framework for Lifelong Program Analysis & Transformation
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Binding, Allocation and Floorplanning in Low Power High-Level Synthesis
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
C is for circuits: capturing FPGA circuits as sequential code for portability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
Optimus: efficient realization of streaming applications on FPGAs
CASES '08 Proceedings of the 2008 international conference on Compilers, architectures and synthesis for embedded systems
Toward energy-efficient computing
Communications of the ACM
Designing Modular Hardware Accelerators in C with ROCCC 2.0
FCCM '10 Proceedings of the 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines
An analysis of power consumption in a smartphone
USENIXATC'10 Proceedings of the 2010 USENIX conference on USENIX annual technical conference
LegUp: high-level synthesis for FPGA-based processor/accelerator systems
Proceedings of the 19th ACM/SIGDA international symposium on Field programmable gate arrays
Asking for Performance: Exploiting Developer Intuition to Guide Instrumentation with TimeTrial
HPCC '11 Proceedings of the 2011 IEEE International Conference on High Performance Computing and Communications
Auto-tuning for energy usage in scientific applications
Euro-Par'11 Proceedings of the 2011 international conference on Parallel Processing - Volume 2
Heterogeneous systems for energy efficient scientific computing
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
Measuring the Gap Between FPGAs and ASICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ScalaPipe: A Streaming Application Generator
SAAHPC '12 Proceedings of the 2012 Symposium on Application Accelerators in High Performance Computing
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In the world of mobile and embedded devices, most of which are battery powered, optimizing computations for low energy is becoming increasingly important. One approach to diminished energy consumption is the use of dedicated hardware logic (rather than general-purpose processors) to execute some portion of the application load. Due to the diversity of applications that one may run on the same device, field-programmable gate arrays (FPGAs) are an attractive target since they can readily be reconfigured to implement different functions and are known to provide significant energy savings in certain domains. Unfortunately, FPGAs are difficult to program, typically requiring expertise in hardware description languages. Here we analyze the potential energy benefits from offloading computations to an FPGA device when starting from a high-level language expression of an application in ScalaPipe [1], which is a domain-specific language embedded in the Scala programming language [2] for creating streaming applications on heterogeneous systems consisting of general-purpose processors and FPGAs. We explore the effect of several synthesis optimizations on improving energy usage without sacrificing application performance, concluding that it is possible to reduce energy consumption significantly for computations even when expressed in a high-level language. Here we investigate total energy consumption, which is a combination of the power use and application run time. All of the optimizations considered improve performance, but some also increase power use, which can be a net loss in energy depending on the application.