Data path allocation based on bipartite weighted matching
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
FPGA-Based Hardware Acceleration of Lithographic Aerial Image Simulation
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
An Introduction to High-Level Synthesis
IEEE Design & Test
A design methodology to implement memory accesses in high-level synthesis
CODES+ISSS '11 Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Massively parallel programming models used as hardware description languages: the OpenCL case
Proceedings of the International Conference on Computer-Aided Design
Communication visualization for bottleneck detection of high-level synthesis applications
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Impact of FPGA architecture on resource sharing in high-level synthesis
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
OpenCL memory infrastructure for FPGAs (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
High-level synthesis: productivity, performance, and software constraints
Journal of Electrical and Computer Engineering - Special issue on ESL Design Methodology
USENIX ATC'12 Proceedings of the 2012 USENIX conference on Annual Technical Conference
Scalable communication architectures for massively parallel hardware multi-processors
Journal of Parallel and Distributed Computing
The RACECAR heuristic for automatic function specialization on multi-core heterogeneous systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
High-level synthesis with LegUp: a crash course for users and researchers
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Improving high level synthesis optimization opportunity through polyhedral transformations
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Dynafuse: dynamic dependence analysis for FPGA pipeline fusion and locality optimizations
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
C-to-CoRAM: compiling perfect loop nests to the portable CoRAM abstraction
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Quipu: A Statistical Model for Predicting Hardware Resources
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Improving the performance of message parsers for embedded systems
Proceedings of the 28th Annual ACM Symposium on Applied Computing
Multi-pumping for resource reduction in FPGA high-level synthesis
Proceedings of the Conference on Design, Automation and Test in Europe
Hybrid interconnect design for heterogeneous hardware accelerators
Proceedings of the Conference on Design, Automation and Test in Europe
Leveraging reconfigurability to raise productivity in FPGA functional debug
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Compiling for power with ScalaPipe
Journal of Systems Architecture: the EUROMICRO Journal
LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors
Exposing ILP in custom hardware with a dataflow compiler IR
PACT '13 Proceedings of the 22nd international conference on Parallel architectures and compilation techniques
SWSL: software synthesis for network lookup
ANCS '13 Proceedings of the ninth ACM/IEEE symposium on Architectures for networking and communications systems
Soft vector processors with streaming pipelines
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
Fast and effective placement and routing directed high-level synthesis for FPGAs
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
OmpSs@Zynq all-programmable SoC ecosystem
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
Proceedings of the Ninth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis
From software to accelerators with LegUp high-level synthesis
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
Design of massively parallel hardware multi-processors for highly-demanding embedded applications
Microprocessors & Microsystems
Fast and standalone Design Space Exploration for High-Level Synthesis under resource constraints
Journal of Systems Architecture: the EUROMICRO Journal
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In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C program as input and automatically compiles the program to a hybrid architecture containing an FPGA-based MIPS soft processor and custom hardware accelerators that communicate through a standard bus interface. Results show that the tool produces hardware solutions of comparable quality to a commercial high-level synthesis tool.