ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Memory controller policies for DRAM power management
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Managing Distributed, Shared L2 Caches through OS-Level Page Allocation
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems
ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Disaggregated memory for expansion and sharing in blade servers
Proceedings of the 36th annual international symposium on Computer architecture
PPT: joint performance/power/thermal management of DRAM memory for multi-core systems
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Future scaling of processor-memory interfaces
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis
Rethinking DRAM design and organization for energy-constrained multi-cores
Proceedings of the 37th annual international symposium on Computer architecture
MemScale: active low-power modes for main memory
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
MARSS: a full system simulator for multicore x86 CPUs
Proceedings of the 48th Design Automation Conference
Share memory aware scheduler: balancing performance and fairness
Proceedings of the great lakes symposium on VLSI
A software memory partition approach for eliminating bank-level interference in multicore systems
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
Frequency Affinity: Analyzing and Maximizing Power Efficiency in Multi-core Systems
MASCOTS '12 Proceedings of the 2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems
Memory Affinity: Balancing Performance, Power, Thermal and Fairness for Multi-core Systems
CLUSTER '12 Proceedings of the 2012 IEEE International Conference on Cluster Computing
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines
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Main Memory is responsible for a large and increasing fraction of the energy consumed by multi-core systems. Therefore, it is critical to address the power issue in the memory subsystem. In this paper, we present a solution to improve memory power efficiency through coordinating page allocation and thread group scheduling (CAS). Partitioning all threads into different thread groups, after using proposed page allocation, threads in the same thread group occupy the same memory rank. Adjusting default Linux CFS, implement thread group scheduling. The CAS alternates active partial memory periodically to allow others power down and prolongs the idleness parts. Our experimental results show that this approach improves energy saving by 10% and reduces performance overhead by 8% with respect to the state of the art polices.