Interleaved parallel schemes: improving memory throughput on supercomputers
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Temperature-aware microarchitecture
Proceedings of the 30th annual international symposium on Computer architecture
Performance directed energy management for main memory and disks
ASPLOS XI Proceedings of the 11th international conference on Architectural support for programming languages and operating systems
Improving energy efficiency by making DRAM less randomly accessed
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Data Replication in Banked DRAMs for Reducing Energy Consumption
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Minimizing energy consumption of banked memories using data recomputation
Proceedings of the 2006 international symposium on Low power electronics and design
Design and implementation of power-aware virtual memory
ATEC '03 Proceedings of the annual conference on USENIX Annual Technical Conference
Thermal modeling and management of DRAM memory systems
Proceedings of the 34th annual international symposium on Computer architecture
Software thermal management of dram memory for multicore systems
SIGMETRICS '08 Proceedings of the 2008 ACM SIGMETRICS international conference on Measurement and modeling of computer systems
Energy efficient proactive thermal management in memory subsystem
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
A survey of architectural techniques for DRAM power management
International Journal of High Performance Systems Architecture
Thermal-aware task scheduling in 3D chip multiprocessor with real-time constrained workloads
ACM Transactions on Embedded Computing Systems (TECS) - Special issue on embedded systems for interactive multimedia services (ES-IMS)
A framework for application guidance in virtual memory systems
Proceedings of the 9th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
Coordinate page allocation and thread group for improving main memory power efficiency
Proceedings of the Workshop on Power-Aware Computing and Systems
CoMETC: Coordinated management of energy/thermal/cooling in servers
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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With the popularity of multi-core architecture, to sustain the memory demands from different cores, the memory system is expected to grow significantly in both speed and capacity. This will lead to increasing power consumption in the memory system. Therefore, it is critical to address the power issue in the memory subsystem. In designing a power-aware memory system, due to the interplay among power, thermal and performance, all the three factors need to be taken into account. In this paper, we propose the first joint performance, power and thermal management framework (PPT) through orchestrating task execution and page allocation. The PPT framework adapts to system loading to maximize power saving and avoid memory hotspot at the same time whiling sustaining the system bandwidth demand.