Knapsack problems: algorithms and computer implementations
Knapsack problems: algorithms and computer implementations
Policy optimization for dynamic power management
DAC '98 Proceedings of the 35th annual Design Automation Conference
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
Adaptive disk spin—down for mobile computers
Mobile Networks and Applications
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Power and energy reduction via pipeline balancing
ISCA '01 Proceedings of the 28th annual international symposium on Computer architecture
IEEE Transactions on Computers
Hardware and Software Techniques for Controlling DRAM Power Modes
IEEE Transactions on Computers
Automatic data migration for reducing energy consumption in multi-bank memory systems
Proceedings of the 39th annual Design Automation Conference
Saving energy with architectural and frequency adaptations for multimedia applications
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Adaptive Disk Spin-down Policies for Mobile Computers
MLICS '95 Proceedings of the 2nd Symposium on Mobile and Location-Independent Computing
Modeling Power Management for Hard Disks
MASCOTS '94 Proceedings of the Second International Workshop on Modeling, Analysis, and Simulation On Computer and Telecommunication Systems
Massive arrays of idle disks for storage archives
Proceedings of the 2002 ACM/IEEE conference on Supercomputing
Conserving disk energy in network servers
ICS '03 Proceedings of the 17th annual international conference on Supercomputing
Positional adaptation of processors: application to energy reduction
Proceedings of the 30th annual international symposium on Computer architecture
DRPM: dynamic speed control for power management in server class disks
Proceedings of the 30th annual international symposium on Computer architecture
Proceedings of the 30th annual international symposium on Computer architecture
Comparing Program Phase Detection Techniques
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Energy conservation techniques for disk array-based servers
Proceedings of the 18th annual international conference on Supercomputing
PB-LRU: a self-tuning power aware storage cache replacement algorithm for conserving disk energy
Proceedings of the 18th annual international conference on Supercomputing
Cooperative I/O: a novel I/O semantics for energy-aware applications
OSDI '02 Proceedings of the 5th symposium on Operating systems design and implementationCopyright restrictions prevent ACM from being able to make the PDFs for this conference available for downloading
Reducing Energy Consumption of Disk Storage Using Power-Aware Cache Management
HPCA '04 Proceedings of the 10th International Symposium on High Performance Computer Architecture
Modeling Hard-Disk Power Consumption
FAST '03 Proceedings of the 2nd USENIX Conference on File and Storage Technologies
Power-Aware Storage Cache Management
IEEE Transactions on Computers
Hibernator: helping disk arrays sleep through the winter
Proceedings of the twentieth ACM symposium on Operating systems principles
Power reduction techniques for microprocessor systems
ACM Computing Surveys (CSUR)
Energy savings through embedded processing on disk system
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A page fault equation for modeling the effect of memory size
Performance Evaluation
Performance-directed energy management using BOS
ACM SIGOPS Operating Systems Review
Limiting the power consumption of main memory
Proceedings of the 34th annual international symposium on Computer architecture
Cross-component energy management: Joint adaptation of processor and memory
ACM Transactions on Architecture and Code Optimization (TACO)
Improving disk reuse for reducing power consumption
ISLPED '07 Proceedings of the 2007 international symposium on Low power electronics and design
A dollar from 15 cents: cross-platform management for internet services
ATC'08 USENIX 2008 Annual Technical Conference on Annual Technical Conference
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
PPT: joint performance/power/thermal management of DRAM memory for multi-core systems
Proceedings of the 14th ACM/IEEE international symposium on Low power electronics and design
Self-optimization of performance-per-watt for interleaved memory systems
HiPC'07 Proceedings of the 14th international conference on High performance computing
MemScale: active low-power modes for main memory
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
A control scheme for batching DRAM requests to improve power efficiency
Proceedings of the ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Coordinating processor and main memory for efficientserver power control
Proceedings of the international conference on Supercomputing
A control scheme for batching DRAM requests to improve power efficiency
ACM SIGMETRICS Performance Evaluation Review - Performance evaluation review
ADSC: application-driven storage control for energy efficiency
ICT-GLOW'11 Proceedings of the First international conference on Information and communication on technology for the fight against global warming
A performance and energy optimization mechanism for cooperation-oriented multiple server clusters
Future Generation Computer Systems
MultiScale: memory system DVFS with multiple memory controllers
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
A survey of architectural techniques for DRAM power management
International Journal of High Performance Systems Architecture
Computational sprinting on a hardware/software testbed
Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems
CoScale: Coordinating CPU and Memory System DVFS in Server Systems
MICRO-45 Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
Conservative row activation to improve memory power efficiency
Proceedings of the 27th international ACM conference on International conference on supercomputing
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Much research has been conducted on energy management for memory and disks. Most studies use control algorithms that dynamically transition devices to low power modes after they are idle for a certain threshold period of time. The control algorithms used in the past have two major limitations. First, they require painstaking, application-dependent manual tuning of their thresholds to achieve energy savings without significantly degrading performance. Second, they do not provide performance guarantees. In one case, they slowed down an application by 835.This paper addresses these two limitations for both memory and disks, making memory/disk energy-saving schemes practical enough to use in real systems. Specifically, we make three contributions: (1) We propose a technique that provides a performance guarantee for control algorithms. We show that our method works well for all tested cases, even with previously proposed algorithms that are not performance-aware. (2) We propose a new control algorithm, Performance-directed Dynamic (PD), that dynamically adjusts its thresholds periodically, based on available slack and recent workload characteristics. For memory, PD consumes the least energy, when compared to previous hand-tuned algorithms combined with a performance guarantee. However, for disks, PD is too complex and its self-tuning is unable to beat previous hand-tuned algorithms. (3) To improve on PD, we propose a simple, optimization-based, threshold-free control algorithm, Performance-directed Static (PS). PS periodically assigns a static configuration by solving an optimization problem that incorporates information about the available slack and recent traffic variability to different chips/disks. We find that PS is the best or close to the best across all performanceguaranteed disk algorithms, including hand-tuned versions.