The turn model for adaptive routing
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
A New Theory of Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
The Odd-Even Turn Model for Adaptive Routing
IEEE Transactions on Parallel and Distributed Systems
Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
IEEE Transactions on Parallel and Distributed Systems
Deadlock-Free Adaptive Routing in Multicomputer Networks Using Virtual Channels
IEEE Transactions on Parallel and Distributed Systems
A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks
IEEE Transactions on Parallel and Distributed Systems
Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation
IEEE Transactions on Computers
MinBD: Minimally-Buffered Deflection Routing for Energy-Efficient Interconnect
NOCS '12 Proceedings of the 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip
A self-routing multistage switching network for broadband ISDN
IEEE Journal on Selected Areas in Communications
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3D NoC is one of the most promising technologies that can overcome the performance barrier of traditional multi-core system. While TSV is the most popular method to realize vertical link for 3D IC, it has many fabrication challenges and the number of TSVs can be limited in practice, thereby limiting vertical bandwidth. Some adaptive routing algorithms have been studied to overcome the bandwidth mismatch. However, there has been no previous study on how much improvement can be achieved by such new algorithms. This paper explores 3D NoC's performance upper-bound beyond which we believe no practically realizable algorithm can reach. We also propose a practically realizable algorithm that achieves performance close to the upper-bound.