Memory bank and register allocation in software synthesis for ASIPs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Exploiting dual data-memory banks in digital signal processors
Proceedings of the seventh international conference on Architectural support for programming languages and operating systems
Journal of the ACM (JACM)
Data and memory optimization techniques for embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
IPDPS '02 Proceedings of the 16th International Parallel and Distributed Processing Symposium
Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Optimal and efficient speculation-based partial redundancy elimination
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
Fast memory bank assignment for fixed-point digital signal processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Energy-aware variable partitioning and instruction scheduling for multibank memory architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
A lifetime optimal algorithm for speculative PRE
ACM Transactions on Architecture and Code Optimization (TACO)
Minimizing bank selection instructions for partitioned memory architecture
CASES '06 Proceedings of the 2006 international conference on Compilers, architecture and synthesis for embedded systems
Minimal placement of bank selection instructions for partitioned memory architectures
ACM Transactions on Embedded Computing Systems (TECS)
Optimizing Bank Selection Instructions by Using Shared Memory
ICESS '08 Proceedings of the 2008 International Conference on Embedded Software and Systems
Eliminating the call stack to save RAM
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
A fresh look at PRE as a maximum flow problem
CC'06 Proceedings of the 15th international conference on Compiler Construction
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For 8-bit microcontrollers, bank-switching is commonly used to increase memory capacity. The disadvantage of this technique is that bank (page) selection instructions are introduced when switching active data (program) bank. The page selection problem is to minimize the number of page selection instructions inserted. While previous efforts work on optimizing bank selection instructions for the data segment, our work focuses on minimizing page selection instructions for the program segment. Minimizing page selection instructions is a more challenging problem as the size of each procedure being allocated is affected by the number of inserted page selection instructions. In this paper, we first give a formal definition of the page selection problem, and then we formulate the problem as an Integer Linear Programming (ILP) to find the optimal solution. We introduce a tabu search heuristic algorithm, TMSEARCH, to solve the problem efficiently. The experimental results show that ILP can find optimal solutions for small-scale problems, and TMSEARCH is able to find good solutions for all benchmarks within reasonable time. Com-pared to a commercial compiler, TMSEARCH reduces total code size between 0.04% and 19.3%, and reduces page selection instructions between 24.3% and 78.7%.