Towards a scalable, low-power all-optical architecture for networks-on-chip

Authors:
Somayyeh Koohi;Yawei Yin;Shaahin Hessabi;S. J. Ben Yoo
Affiliations:
Sharif University of Technology, Tehran, Iran;University of California, Davis, CA;Sharif University of Technology, Tehran, Iran;University of California, Davis, CA
Venue:
ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Design Challenges for Many-Core Processors, Special Section on ESTIMedia'13 and Regular Papers
Year:
2014

Citing 17
Cited 0

The SPLASH-2 programs: characterization and methodological considerations

ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
What next?: A dozen information-technology research goals

Journal of the ACM (JACM)
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh

Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors

Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
Predictions of CMOS compatible on-chip optical interconnect

Integration, the VLSI Journal
On the Design of a Photonic Network-on-Chip

NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
System level assessment of an optical NoC in an MPSoC platform

Proceedings of the conference on Design, automation and test in Europe
Corona: System Implications of Emerging Nanophotonic Technology

ISCA '08 Proceedings of the 35th Annual International Symposium on Computer Architecture
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors

IEEE Transactions on Computers
Firefly: illuminating future network-on-chip with nanophotonics

Proceedings of the 36th annual international symposium on Computer architecture
Phastlane: a rapid transit optical routing network

Proceedings of the 36th annual international symposium on Computer architecture
A Low-power Low-cost Optical Router for Optical Networks-on-Chip in Multiprocessor Systems-on-Chip

ISVLSI '09 Proceedings of the 2009 IEEE Computer Society Annual Symposium on VLSI
Silicon-photonic clos networks for global on-chip communication

NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
Contention-free on-chip routing of optical packets

NOCS '09 Proceedings of the 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip
A power-efficient all-optical on-chip interconnect using wavelength-based oblivious routing

Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems
A low-power fat tree-based optical network-on-chip for multiprocessor system-on-chip

Proceedings of the Conference on Design, Automation and Test in Europe
Optical tokens in many-core processors

Optical tokens in many-core processors

Quantified Score

Hi-index	0.00

Visualization

Abstract

This article proposes a scalable wavelength-routed optical Network on Chip (NoC) based on the Spidergon topology, named Power-efficient Scalable Wavelength-routed Network-on-chip (PeSWaN). The key idea of the proposed all-optical architecture is the utilization of per-receiver wavelengths in the data network to prevent network contention and the adoption of per-sender wavelengths in the control network to avoid end-point contention. By performing a series of simulations, we study the efficiency of the proposed architecture, its power and energy consumption, and the data transmission delay. Moreover, we compare the proposed architecture with electrical NoCs and alternative ONoC architectures under various traffic patterns.