Power reduction by simultaneous voltage scaling and gate sizing
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
On gate level power optimization using dual-supply voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A low power scheduling scheme with resources operating at multiple voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 13th ACM Great Lakes symposium on VLSI
A methodology for low power scheduling with resources operating at multiple voltages
Integration, the VLSI Journal
An approach for reducing dynamic power consumption in synchronous sequential digital designs
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Power minimization in QoS sensitive systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scheduling and Partitioning Schemes for Low Power Designs Using Multiple Supply Voltages
The Journal of Supercomputing
An on-line approach for power minimization in QoS sensitive systems
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Scheduling and optimal voltage selection with multiple supply voltages under resource constraints
Integration, the VLSI Journal
Multiple voltage synthesis scheme for low power design under timing and resource constraints
Integrated Computer-Aided Engineering
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Scheduling with integer time budgeting for low-power optimization
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Power optimization for simultaneous scheduling and partitioning with multiple voltages
MMACTE'05 Proceedings of the 7th WSEAS International Conference on Mathematical Methods and Computational Techniques In Electrical Engineering
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