A defect-tolerant and fully testable PLA

Authors:
N. Wehn;M. Glesner;K. Caesar;P. Mann;A. roth
Affiliations:
Institut fuer Halbleitertechnik, Fachgebiet Halbleiterschaltungstechnik, Technische Hochschule Darmstadt, D-6100 Darmstadt;Institut fuer Halbleitertechnik, Fachgebiet Halbleiterschaltungstechnik, Technische Hochschule Darmstadt, D-6100 Darmstadt;Institut fuer Halbleitertechnik, Fachgebiet Halbleiterschaltungstechnik, Technische Hochschule Darmstadt, D-6100 Darmstadt;Institut fuer Halbleitertechnik, Fachgebiet Halbleiterschaltungstechnik, Technische Hochschule Darmstadt, D-6100 Darmstadt;Institut fuer Halbleitertechnik, Fachgebiet Halbleiterschaltungstechnik, Technische Hochschule Darmstadt, D-6100 Darmstadt
Venue:
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Year:
1988

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Abstract

This paper presents a defect-tolerant and fully testable PLA allowing for the repair of a defective chip. The repair process is described. Special emphasis is devoted to the location of defects inside a PLA. The defect location mechanism is completely topological and circuit independent and therefore easy to adapt to existing PLA generators. Yield considerations for this type of PLAs are presented.