Resource constrained dataflow retiming heuristics for VLIW ASIPs

Authors:
M. Jacome;G. de Veciana;C. Akturan
Affiliations:
Department of Electrical and Computer Engineering, University of Texas, Austin, TX;Department of Electrical and Computer Engineering, University of Texas, Austin, TX;Department of Electrical and Computer Engineering, University of Texas, Austin, TX
Venue:
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Year:
1999

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