Loop quantization: a generalized loop unwinding technique
Journal of Parallel and Distributed Computing - Special Issue on Languages, Compilers and environments for Parallel Programming
PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
A wide instruction word architecture for fine-grain parallelism
Proceedings of the conference on CONPAR 88
A compilation technique for software pipelining of loops with conditional jumps
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
SIGPLAN '84 Proceedings of the 1984 SIGPLAN symposium on Compiler construction
A Development Environment for Horizontal Microcode
IEEE Transactions on Software Engineering
Compile-time scheduling and optimization for asynchronous machines (multiprocessor, compiler, parallel processing)
Compaction-based parallelization
Compaction-based parallelization
A timed Petri-net model for fine-grain loop scheduling
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Architecture synthesis of high-performance application-specific processors
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A new technique for induction variable removal
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
Efficient superscalar performance through boosting
ASPLOS V Proceedings of the fifth international conference on Architectural support for programming languages and operating systems
An efficient resource-constrained global scheduling technique for superscalar and VLIW processors
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
Compiling real-time programs into schedulable code
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
A novel framework of register allocation for software pipelining
POPL '93 Proceedings of the 20th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
VLIW compilation techniques in a superscalar environment
PLDI '94 Proceedings of the ACM SIGPLAN 1994 conference on Programming language design and implementation
Avoidance and suppression of compensation code in a trace scheduling compiler
ACM Transactions on Programming Languages and Systems (TOPLAS)
Instruction scheduling in the TOBEY compiler
IBM Journal of Research and Development
Resource-Constrained Software Pipelining
IEEE Transactions on Parallel and Distributed Systems
Generating several solutions for the scheduling problem in high-level synthesis
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Unconstrained speculative execution with predicated state buffering
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Critical path reduction for scalar programs
Proceedings of the 28th annual international symposium on Microarchitecture
A Framework for Resource-Constrained Rate-Optimal Software Pipelining
IEEE Transactions on Parallel and Distributed Systems
Using a lookahead window in a compaction-based parallelizing compiler
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Realistic scheduling: compaction for pipelined architectures
MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture
Experiences with Cooperating Register Allocation and Instruction Scheduling
International Journal of Parallel Programming
A code-motion pruning technique for global scheduling
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Conditional speculation and its effects on performance and area for high-level snthesis
Proceedings of the 14th international symposium on Systems synthesis
Dynamic common sub-expression elimination during scheduling in high-level synthesis
Proceedings of the 15th international symposium on System Synthesis
Making Compaction-Based Parallelization Affordable
IEEE Transactions on Parallel and Distributed Systems
Compiling Real-Time Programs With Timing Constraint Refinement and Structural Code Motion
IEEE Transactions on Software Engineering
Resource Spackling: A Framework for Integrating Register Allocation in Local and Global Schedulers
PACT '94 Proceedings of the IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques
Selective Scheduling Framework for Speculative Operations in VLIW and Superscalar Processors
PACT '93 Proceedings of the IFIP WG10.3. Working Conference on Architectures and Compilation Techniques for Fine and Medium Grain Parallelism
A timed Petri-net model for fine-grain loop scheduling
CASCON '91 Proceedings of the 1991 conference of the Centre for Advanced Studies on Collaborative research
Register allocation for optimal loop scheduling
CASCON '93 Proceedings of the 1993 conference of the Centre for Advanced Studies on Collaborative research: distributed computing - Volume 2
Coordinated parallelizing compiler optimizations and high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Using a lookahead window in a compaction-based parallelizing compiler
ACM SIGMICRO Newsletter
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
CC'07 Proceedings of the 16th international conference on Compiler construction
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This paper presents a new approach to resource-constrained compiler extraction of fine-grain parallelism, targeted towards VLIW supercomputers, and in particular, the IBM VLIW (Very Large Instruction Word) processor. The algorithms described integrate resource limitations into Percolation Scheduling—a global parallelization technique—to deal with resource constraints, without sacrificing the generality and completeness of Percolation Scheduling in the process. This is in sharp contrast with previous approaches which either applied only to conditional-free code, or drastically limited the parallelization process by imposing relatively local heuristic resource constraints early in the scheduling process.