Self-reforming routing for stochastic search in VLSI interconnection layout

  • Authors:
  • Yukiko Kubo;Yasuhiro Takashima;Shigetoshi Nakatake;Yoji Kajitani

  • Affiliations:
  • Department of Electrical and Electronic Eng., Tokyo Inst. of Technology, 2-12-1 Ookayama, Meguro-ku, Tokyo 152-8552, Japan;Information Science, Japan Advanced Inst. of Science and Technology, Tatsunokuchi, Nomi-gun, Ishikawa 932-1292, Japan;Faculty of International Environmental Eng., Promotion and Development Office, Kitakyushu University, Kokuraminami-ku, Kitakyushu-city, Fukuoka 802-8577, Japan;Department of Electrical and Electronic Eng., Tokyo Inst. of Technology, 2-12-1 Ookayama, Meguro-ku, Tokyo 152-8552, Japan

  • Venue:
  • ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
  • Year:
  • 2000

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Abstract