Performance optimization of VLSI interconnect layout
Integration, the VLSI Journal
Analysis and justification of a simple, practical 2 1/2-D capacitance extraction methodology
DAC '97 Proceedings of the 34th annual Design Automation Conference
Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Simultaneous shield insertion and net ordering under explicit RLC noise constraint
Proceedings of the 38th annual Design Automation Conference
Fitting Equations to Data: Computer Analysis of Multifactor Data
Fitting Equations to Data: Computer Analysis of Multifactor Data
A twisted-bundle layout structure for minimizing inductive coupling noise
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Quick On-Chip Self- and Mutual-Inductance Screen
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Congestion-driven codesign of power and signal networks
Proceedings of the 39th annual Design Automation Conference
Formulae and applications of interconnect estimation considering shield insertion and net ordering
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
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In this paper, we study the min-area simultaneous signal and power routing problem under a given noise bound (i.e., the SPR/NB problem). The resulting SPR/NB solution is free of capacitive noise and satisfies a given inductive noise bound under the $K_{eff}$ model. We first develop the pre-routing area estimation techniques for the min-area simultaneous shield insertion and net ordering (SINO) solutions. We then propose a two-phase approach to solve the min-area SPR/NB problem: in the first phase, we define a regular power/ground (P/G) structure according to the above area estimation; and in the second phase, we carry out SINO procedures to search for the best solution in a very limited neighborhood of the pre-defined P/G structure. Experimental results show that our approach is able to achieve the min-area SPR/NB solution efficiently by searching only the first-order neighborhood of the pre-defined P/G structure. Our ongoing work extends the interconnect estimation and two-phase algorithm to an explicit RLC noise model.