Simultaneous driver sizing and buffer insertion using a delay penalty estimation technique

  • Authors:
  • Charles Alpert;Chris Chu;Gopal Gandham;Miloš Hrkić;Jiang Hu;Chandramouli Kashyap;Stephen Quay

  • Affiliations:
  • IBM Corp., Austin, TX;Iowa State University, Ames, IA;IBM Corp., Hopewell Junction, NY;University of Illinois at Chicago, Chicago, IL;IBM Corp., Austin, TX;IBM Corp., Austin, TX;IBM Corp., Austin, TX

  • Venue:
  • Proceedings of the 2002 international symposium on Physical design
  • Year:
  • 2002

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Abstract

To achieve timing closure in a placed design, buffer insertion and driver sizing are two of the most effective transforms that can be applied. Since the driver sizing solution and the buffer insertion solution affect each other, sub-optimal solutions may result if these techniques are applied sequentially instead of simultaneously. We show how to simply extend van Ginneken's buffer insertion algorithm to simultaneously incorporate driver sizing and introduce the idea of a delay penalty to encapsulate the effect of driver sizing on the previous stage. The delay penalty can be pre-computed efficiently via dynamic programming. Experimental results show that using driver sizing with a delay penalty function obtains designs with superior timing and area characteristics.