A Simulation Study of the CRAY X-MP Memory System
IEEE Transactions on Computers
A parallel processor architecture for graphics arithmetic operations
SIGGRAPH '87 Proceedings of the 14th annual conference on Computer graphics and interactive techniques
Video RAMs: Structure and Applications
IEEE Micro
Micro-analysis of the titans's operating pipe
ICS '88 Proceedings of the 2nd international conference on Supercomputing
Strategies for cache and local memory management by global program transformation
Proceedings of the 1st International Conference on Supercomputing
Parallel Computers Two: Architecture, Programming and Algorithms
Parallel Computers Two: Architecture, Programming and Algorithms
Design of a Computer—The Control Data 6600
Design of a Computer—The Control Data 6600
Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories
SIGGRAPH '89 Proceedings of the 16th annual conference on Computer graphics and interactive techniques
Characterization of parallelism and deadlocks in distributed digital logic simulation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
C2MP: a cache-coherent, distributed memory multiprocessor-system
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
Performance analysis of high-speed computers
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
Design for interactive performance in a virtual laboratory
I3D '90 Proceedings of the 1990 symposium on Interactive 3D graphics
ISCA '91 Proceedings of the 18th annual international symposium on Computer architecture
Interactive quantitative visualization
IBM Journal of Research and Development
Three-dimensional medical imaging: algorithms and computer systems
ACM Computing Surveys (CSUR)
An evaluation of the Chandy-Misra-Bryant algorithm for digital logic simulation
ACM Transactions on Modeling and Computer Simulation (TOMACS) - Special issue on parallel and distributed systems performance
A study of partitioned vector register files
Proceedings of the 1992 ACM/IEEE conference on Supercomputing
Pixel merging for object-parallel rendering: a distributed snooping algorithm
PRS '93 Proceedings of the 1993 symposium on Parallel rendering
The effectiveness of caches for vector processors
ICS '94 Proceedings of the 8th international conference on Supercomputing
Graphics Processing on a Graphics Supercomputer
IEEE Computer Graphics and Applications
Parallel Distributed-Time Logic Simulation
IEEE Design & Test
Block, Multistride Vector, and FFT Accesses in Parallel Memory Systems
IEEE Transactions on Parallel and Distributed Systems
Evaluation of cache consistency algorithm performance
MASCOTS '96 Proceedings of the 4th International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunications Systems
A real-time raster scan display for 3-D graphics
EGGH'89 Proceedings of the Fourth Eurographics conference on Advances in Computer Graphics Hardware
An efficient massively parallel rasterization scheme for a high performance graphics system
EGGH'92 Proceedings of the Seventh Eurographics conference on Graphics Hardware
| Hi-index | 4.10 |
The design criteria for the Titan are outlined, and the hardware, architecture, and implementation developed to meet them are examined. The key architectural elements in Titan are described, and the reasoning behind their selection is presented. Titan's processor subsystem is explored, focusing on how it reduces the cost and complexity of graphics-specific hardware. The design constraints and implementation of the I/O subsystem are discussed. The Titan operating system, compilers, and graphics software are described, and a statistical summary of Titan's performance is given.