Application of Joint Time-Frequency Analysis in Mixed-Signal Testing
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
An Integration of Memory-Based Analog Signal Generation into Current DFT Architectures
Proceedings of the IEEE International Test Conference on Test and Design Validity
Proceedings of the IEEE International Test Conference
Static Testing of ADCs Using Wavelet Transforms
ATS '97 Proceedings of the 6th Asian Test Symposium
Low-cost and efficient digital-compatible BIST for analog circuits using pulse response sampling
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Test Metrics for Analog Parametric Faults
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Subband Filtering Scheme for Analog and Mixed-Signal Circuit Testing
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Optimal testing of VLSI analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Probabilistic fault detection and the selection of measurements for analog integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Test set selection for structural faults in analog IC's
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analog testing by characteristic observation inference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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In this paper, we present a novel approach to use test stimuli generated by digital components of a mixed-signal circuit for testing its analog components. A wavelet transform is applied to the response signal of the device under test (DUT). We will show, that in comparison to Fourier transform or no transform at all, particular properties of this transformation are advantageous for mixed-signal test and especially built-in self test.We introduce a new method for test measurement selection based on a non-deterministic parametric fault model for analog circuits. This approach allows for noise and measurement error in testing. We show, how test quality can be optimized in the presented fault model. Our test methodology is demonstrated on an analog CMOS bandpass filter.