Larch: languages and tools for formal specification
Larch: languages and tools for formal specification
High-level transformations for minimizing syntactic variances
DAC '93 Proceedings of the 30th international Design Automation Conference
Condition graphs for high-quality behavioral synthesis
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Bridge: a versatile behavioral synthesis system
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
An algorithm to determine mutually exclusive operations in behavioral descriptions
Proceedings of the conference on Design, automation and test in Europe
Correct high-level synthesis: a formal perspective
Proceedings of the conference on Design, automation and test in Europe
Fundamentals of Algebraic Specification I
Fundamentals of Algebraic Specification I
Hierarchical Conditional Dependency Graphs for Mutual Exclusiveness Identification
VLSID '99 Proceedings of the 12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
Hierarchical Conditional Dependency Graphs for Conditional Resource Sharing
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
Hardware reuse in modern application-specific processors and accelerators
Microprocessors & Microsystems
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The degree of conditional hardware reuse achieved after a high-level synthesis process depends on two factors: the number of mutually exclusive (mutex) operations pairs that an algorithm can detect and the description style used by the designer when specifying the system. In this paper, we propose a method that deals with both aspects. First, we propose a simple and homogeneous mechanism to analyze the input description and identify all the mutex operations pairs, independently of the conditional constructs (IF or CASE) used to specify the control flow of the system, and independently of the operators (logic or relational) needed to specify the conditions. Second, we provide a collection of formal transformations on the input description in order to overcome the "non-intended" design decisions (related to implicit hardware reuse) taken by the designer when writing the system description. Their application produces a specification of the same behavior that leads to improved implementations--in terms of the degree of conditional reuse that is achieved. Both facilities are possible thanks to the chosen internal representation mechanism, which is a mathematical model of the description, and to an underlying formal calculus that allows the description to be correctly manipulated. These ideas have been implemented in an algorithm that obtains better results than previous approaches.