Datapath scheduling with multiple supply voltages and level converters
ACM Transactions on Design Automation of Electronic Systems (TODAES)
High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
Layout techniques supporting the use of dual supply voltages for cell-based designs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Synthesis of low power CMOS VLSI circuits using dual supply voltages
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
System-level power optimization: techniques and tools
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Low-power design methodology and applications utilizing dual supply voltages
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Cell-based layout techniques supporting gate-level voltage scaling for low power
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Interconnect-aware high-level synthesis for low power
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Micro-architecture design and control speculation for energy reduction
Power aware computing
Algorithms Promoting the Use of Dual Supply Voltages for Power-Driven Designs
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Low-power design techniques for scaled technologies
Integration, the VLSI Journal - Special issue: Low-power design techniques
Low-power design techniques for scaled technologies
Integration, the VLSI Journal - Special issue: Low-power design techniques
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In this paper we will consider how to select an optimal set of supply voltages and account for level conversion costs when optimizing the schedule of a resource dominated data path for minimum energy dissipation. An integer linear program (ILP) is presented for minimum energy schedules under latency, supply voltage, and resource constraints. The supply voltage assignment for each resource is modeled as fixed for all time. Schedules were generated for a variety of data path structures, resource and latency constraints. Resource constraints tended to limit the use of reduced supply voltages. With latency constraints loosened to 1.5x minimum latency, unlimited resources, and two power supplies, energy savings ranged from 53% to 70% compared to 5V operation. When resource constraints were applied, savings dropped to a range of 46% to 58%. Loosened latency constraints resulted in increased use of lower supply voltages. With resource constraints unchanged and latency constraints of 2x minimum latency, energy savings increased to a range of 64% to 76%. In no case did three supplies decrease energy by more than 5% compared to two supplies.