Formal verification of word-level specifications
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Dynamic minimization of word-level decision diagrams
Proceedings of the conference on Design, automation and test in Europe
Verifying integrity of decision diagrams
Integration, the VLSI Journal
Minimization of word-level decision diagrams
Integration, the VLSI Journal
Sequential Equivalence Checking by Symbolic Simulation
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Formal Verification of Designs with Complex Control by Symbolic Simulation
CHARME '99 Proceedings of the 10th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Verifying Integrity of Decision Diagrams
SAFECOMP '98 Proceedings of the 17th International Conference on Computer Safety, Reliability and Security
Using Word-Level Information in Formal Hardware Verification
Automation and Remote Control
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