String matching on multicontext FPGAs using self-reconfiguration
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Self Modifying Circuitry - A Platform for Tractable Virtual Circuitry
FPL '98 Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, From FPGAs to Computing Paradigm
Genetic Programming Using Self-Reconfigurable FPGAs
FPL '99 Proceedings of the 9th International Workshop on Field-Programmable Logic and Applications
A Self-Reconfigurable Gate Array Architecture
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Fast Regular Expression Matching Using FPGAs
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Configuring the Circuit Switched Tree for Multiple Width Communications
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 8 - Volume 09
Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs
Journal of Systems Architecture: the EUROMICRO Journal
Multi-level reconfigurable architectures in the switch model
Journal of Systems Architecture: the EUROMICRO Journal
Logarithmic-Time FPGA Bitstream Analysis: A Step Towards JIT Hardware Compilation
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Partial reconfigurable fir filtering system using distributed arithmetic
International Journal of Reconfigurable Computing - Special issue on selected papers from ReconFig 2009 International conference on reconfigurable computing and FPGAs (ReconFig 2009)
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Self-reconfiguration is a technique using which configured logic can quickly modify itself at runtime to suit application requirements. Although performance improvements using self-reconfiguration have been demonstrated, the technique itself has been only informally described. Based on an abstract reconfigurable device model, a precise definition of self-reconfiguration is presented in this paper. Various practical issues in efficiently implementing self-reconfiguration are also discussed.A competing approach to self-reconfiguration is the use of a von Neumann processor on the same chip as the reconfigurable logic. Both alternatives can provide on-chip configuration modification. The performance of both alternatives is evaluated for a frequently used configuration modification operation. The approaches used for both alternatives are described and the performance of both approaches is evaluated. Self-reconfiguration is found to require significantly lesser area as well as significantly lesser time compared to the attached processor approach.