Register-transfer level digital design automation: The allocation process
DAC '78 Proceedings of the 15th Design Automation Conference
DAC '78 Proceedings of the 15th Design Automation Conference
SALOGS-IV-A program to perform logic simulation and fault diagnosis
DAC '78 Proceedings of the 15th Design Automation Conference
Measuring designer performance to verify design automation systems
DAC '77 Proceedings of the 14th Design Automation Conference
Theory of Clocking for Maximum Execution Overlap of High-Speed Digital Systems
IEEE Transactions on Computers
The VLSI design automation assistant: prototype system
25 years of DAC Papers on Twenty-five years of electronic design automation
Relevant issues in high-level connectivity synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
BECOME: behavior level circuit synthesis based on structure mapping
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
The ITT VLSI design system: CAD integration in a multi-national environment
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
An experimental representation for organizational level designs and synthesis
CSC '85 Proceedings of the 1985 ACM thirteenth annual conference on Computer Science
Testing and Debugging Custom Integrated Circuits
ACM Computing Surveys (CSUR)
Computer-aided partitioning of behavioral hardware descriptions
DAC '83 Proceedings of the 20th Design Automation Conference
The VLSI Design Automation Assistant: Prototype system
DAC '83 Proceedings of the 20th Design Automation Conference
Polaris: Polarity propagation algorithm for combinational logic synthesis
DAC '84 Proceedings of the 21st Design Automation Conference
On proving the correctness of optimizing transformations in a digital design automation system
DAC '81 Proceedings of the 18th Design Automation Conference
Hierarchical design verification for large digital systems
DAC '81 Proceedings of the 18th Design Automation Conference
The modeling and synthesis of bus systems
DAC '81 Proceedings of the 18th Design Automation Conference
Functional modelling for logic simulation
DAC '81 Proceedings of the 18th Design Automation Conference
Issues in IC implementation of high level, abstract designs
DAC '80 Proceedings of the 17th Design Automation Conference
An Abstract Model of Behavior for Hardware Descriptions
IEEE Transactions on Computers
Processor Description Languages
Processor Description Languages
Logic synthesis through local transformations
IBM Journal of Research and Development
Instruction set processor specifications (ISPS): the notation and its applications
IEEE Transactions on Computers
Measuring designer performance to verify design automation systems
IEEE Transactions on Computers
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This paper illustrates the methodology of the CMU Design Automation System by presenting an automated design of the PDP-8/E data paths from a functional description. This automated design (using synthesis techniques) is compared both to DEC's implementation and the intersil single chip implementation.