CADMON: Improving the CAD system human interface
DAC '78 Proceedings of the 15th Design Automation Conference
Constructing test cases for partitioning heuristics
IEEE Transactions on Computers
A neural network design for circuit partitioning
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
VLSI cell placement techniques
ACM Computing Surveys (CSUR)
Automatic placement a review of current techniques (tutorial session)
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A placement technique based on minimization and even distribution of crossovers
ACM SIGDA Newsletter
Placement of variable size circuits on LSI masterslices
DAC '81 Proceedings of the 18th Design Automation Conference
Efficient placement and routing techniques for master slice LSI
DAC '80 Proceedings of the 17th Design Automation Conference
Comet - a fast component placer
DAC '80 Proceedings of the 17th Design Automation Conference
Gate assignment and pack placement: Two approaches compared
DAC '80 Proceedings of the 17th Design Automation Conference
An interactive system for VLSI chip physical design
IBM Journal of Research and Development
An Improved Min-Cut Algonthm for Partitioning VLSI Networks
IEEE Transactions on Computers
A computer-aided VLSI layout system
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
An efficient heuristic for standard-cell placement
Integration, the VLSI Journal
| Hi-index | 0.01 |
Placement is one of the numerous coordinated capabilities of the Hughes Computer-Aided Design (CAD) System. It is applicable to all of the technologies currently used to produce digital electronic assemblies and is particularly well suited to the allocation requirements of LSI and VLSI. The algorithm that is used iteratively selects sequences of module interchanges that minimize the number of signal crossings over a designated partition (line) across the assembly. An orderly succession of horizontal and vertical partitions causes a rearrangement of modules that facilitates routing, distributes wiring density and achieves minimal wirelength. The placement algorithm, its computational efficiency, its robust applicability, and the parts it plays within the Hughes CAD System are presented.