Leakage Current in Sub-Quarter Micron MOSFET: A Perspective on Stressed Delta IDDQ Testing
Journal of Electronic Testing: Theory and Applications
An Empirical Study on the Effects of Test Type Ordering on
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Increasing the IDDQ Test Resolution Using Current Prediction
ITC '00 Proceedings of the 2000 IEEE International Test Conference
The Future of Delta IDDQ Testing
ITC '01 Proceedings of the 2001 IEEE International Test Conference
FPGA Bridging Fault Detection and Location via Differential I{DDQ}
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
IDDX-based test methods: A survey
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Novel On-Chip Amplifier for Fast IDD Current Monitoring
Analog Integrated Circuits and Signal Processing
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Power management using test-pattern ordering for wafer-level test during burn-in
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Point defects, which cause small current increases and increased chip background currents at elevated temperatures can mask potentially early failures. The difficulty of screening point defects will likely also occur in denser geometries. Delta Iddq is shown to help distinguish between early fail and reliable chips at these elevated temperatures. Memory application demonstrates that a variety of delta Iddq tests can screen early fail defects.