Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A Diagnostic ATPG for Delay Faults Based on Genetic Algorithms
Proceedings of the IEEE International Test Conference on Test and Design Validity
GARDA: a diagnostic ATPG for large synchronous sequential circuits
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Diagnostic Test Pattern Generation for Sequential Circuits
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Properties of the input pattern fault model
ICCD '97 Proceedings of the 1997 International Conference on Computer Design (ICCD '97)
Diagnosis oriented test pattern generation
EURO-DAC '90 Proceedings of the conference on European design automation
Multiple-fault diagnosis based on single-fault activation and single-output observation
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Proceedings of the conference on Design, automation and test in Europe
Adaptive Debug and Diagnosis Without Fault Dictionaries
Journal of Electronic Testing: Theory and Applications
Effective diagnostic pattern generation strategy for transition-delay faults in full-scan SOCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Test Generation for VLSI circuits suffers fromtwo competing goals - to reduce the cost of test byminimizing the number of tests, and to be able todiagnose errors when failures occur. This paperoutlines a methodology for generating diagnostic testpatterns as they are needed using standard ATPG tools.These diagnostic patterns are guaranteed to providebetter diagnostic resolution than traditional manufacturingtest patterns, and the use of standard ATPG toolsenables generation of diagnostic patterns only whenthese patterns are needed.