A New Algorithm for Global Fault Collapsing into Equivalence and Dominance Sets

Authors:
A. V. S. S. Prasad;Vishwani D. Agrawal;Madhusudan V. Atre
Affiliations:
-;-;-
Venue:
ITC '02 Proceedings of the 2002 IEEE International Test Conference
Year:
2002

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Abstract

Nodes in a dominance graph represent faults of a circuit. A Directed edge from node f_i to node f_jmeans that fault f_j dominates f_j. The equivalence of faults f_i and f_j is indicated by the presence of simultaneous edges f_i\to f_j and f_j\to f_i. When local dominance and equivalence relations are included in this graph, its transitive closure provides the collapsed fault sets. Pre-collapsed fault sets of standard cells and other logic blocks can be stored in a graph library for hierarchical fault collapsing. Examples show how more compact fault sets are obtained by using functional equivalences that can be found by analysis of small cells. Benchmark circuits c432 and c499 are used to illustrate the use of functional fault collapsing within their exclusive-OR cells.