Proofs: a fast, memory efficient sequential circuit fault simulator
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Minimal cost one-dimensional linear hybrid cellular automata of degree through 500
Journal of Electronic Testing: Theory and Applications
ATPG for Heat Dissipation Minimization During Test Application
IEEE Transactions on Computers
PROTEST: a tool for probabilistic testability analysis
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
DS-LFSR: A New BIST TPG for Low Heat Dissipation
Proceedings of the IEEE International Test Conference
POWERTEST: A Tool for Energy Conscious Weighted Random Pattern Testing
VLSID '99 Proceedings of the 12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
Leakage current optimization techniques during test based on don't care bits assignment
Journal of Computer Science and Technology
Opposite-phase register switching for peak current minimization
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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In order to meet the power and reliability constraints, it is important to reduce both average and peak power during BIST operations. In this paper we propose a Low Power Automatic Test Pattern Generator (LPATPG) with peak power reduction. The technique can be used during on-line testing of large circuits requiring low power consumption. LPATPG can be implemented using linear cellular automata (CA) with appropriate external weighting logic. While the average power is reduced by finding the optimal signal activities (probabilities of signal switching) at the primary inputs, the peak power is reduced by restricting the number of active primary inputs.Results on ISCAS benchmark circuits show that while achieving high fault coverage, average power reduction up to 90%, peak power reduction up to 37% and energy reduction up to 93% can be achieved (compared to equi-probable random pattern generator by linear cellular automata), and the ratio of the number of high power vectors (vectors violate the power limit) in LPATPG sequence to the number of high power vectors in the equi-probable random sequence can be as low as 0_44%.