A transformation based algorithm for reversible logic synthesis
Proceedings of the 40th annual Design Automation Conference
Quantum ternary parallel adder/subtractor with partially-look-ahead carry
Journal of Systems Architecture: the EUROMICRO Journal
On adder design using a reversible logic gate
EHAC'10 Proceedings of the 9th WSEAS international conference on Electronics, hardware, wireless and optical communications
Adder designs using reversible logic gates
WSEAS Transactions on Circuits and Systems
Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Transistor realization of reversible "ZS" series gates and reversible array multiplier
Microelectronics Journal
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Design of efficient reversible logic-based binary and BCD adder circuits
ACM Journal on Emerging Technologies in Computing Systems (JETC)
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Conservative and reversible logic gates are widely known to be compatible with revolutionary computing paradigms such as optical and quantum computing. A fundamental conservative reversible logic gate is the Fredkin gate. This paper presents efficient adder circuits based on the Fredkin gate. Novel full adder circuits using Fredkin gates are proposed which have lower hardware complexity than the current state-of-the-art, while generating the additional signals required for carry skip adder architectures. The traditional ripple carry adder and several carry skip adder topologies are compared. Theoretical performance of each adder is determined and compared. Although the variable sized block carry skip adder is determined to have shorter delay than the fixed block size carry skip adder, the performance gains are not sufficient to warrant the required additional hardware complexity.